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| SN54/74LS251 8-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS The TTL/MSI SN74LS251 is a high speed 8-Input Digital Multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. The LS251 can be used as a universal function generator to generate any logic function of four variables. Both assertion and negation outputs are provided. 8-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS LOW POWER SCHOTTKY * * * * * Schottky Process for High Speed Multifunction Capability On-Chip Select Logic Decoding Inverting and Non-Inverting 3-State Outputs Input Clamp Diodes Limit High Speed Termination Effects CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 I4 15 I5 14 I6 13 I7 12 S0 11 S1 10 S2 9 16 J SUFFIX CERAMIC CASE 620-09 1 16 1 N SUFFIX PLASTIC CASE 648-08 1 I3 PIN NAMES S0-S2 E0 I0-I7 Z Z 2 I2 3 I1 4 I0 5 Z 6 Z 7 E0 8 GND LOADING (Note a) HIGH LOW 0.25 U.L. 0.25 U.L. 0.25 U.L. 15 U.L. 15 U.L. 16 1 D SUFFIX SOIC CASE 751B-03 Select Inputs Output Enable (Active LOW) Inputs Multiplexer Inputs Multiplexer Output Complementary Multiplexer Output 0.5 U.L. 0.5 U.L. 0.5 U.L. 65 U.L. 65 U.L. ORDERING INFORMATION SN54LSXXXJ Ceramic SN74LSXXXN Plastic SN74LSXXXDW SOIC NOTES: a. 1 TTL Unit Load (U.L.) = 40 A HIGH/1.6 mA LOW. LOGIC DIAGRAM S2 S1 S0 E1 9 10 11 7 I0 4 I1 3 I2 2 I3 1 I4 15 I5 14 I6 13 I7 12 VCC = PIN 16 GND = PIN 8 = PIN NUMBERS Z 5 6 Z FAST AND LS TTL DATA 5-1 SN54/74LS251 FUNCTIONAL DESCRIPTION The LS251 is a logical implementation of a single pole, 8-position switch with the switch position controlled by the state of three Select inputs, S0, S1, S2. Both assertion and negation outputs are provided. The Output Enable input (EO) is active LOW. When it is activated, the logic function provided at the output is: Z = EO (I0 S0 S1 S2 + I1 S0 S1 S2 + I2 S0 S1 Z = EO S2 + I3 S0 S1 S2 + I4 S0 S1 S2 + I5 S0 Z = EO S1 S2 + I6 S0 S1 S2 + I7 S0 S1 S2). When the Output Enable is HIGH, both outputs are in the high impedance (high Z) state. This feature allows multiplexer expansion by tying the outputs of up to 128 devices together. When the outputs of the 3-state devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. The Output Enable signals should be designed to ensure there is no overlap in the active LOW portion of the enable voltage. TRUTH TABLE E0 H L L L L L L L L L L L L L L L L S2 X L L L L L L L L H H H H H H H H S1 X L L L L H H H H L L L L H H H H S0 X L L H H L L H H L L H H L L H H I0 X L H X X X X X X X X X X X X X X I1 X X X L H X X X X X X X X X X X X I2 X X X X X L H X X X X X X X X X X I3 X X X X X X X L H X X X X X X X X I4 X X X X X X X X X L H X X X X X X I5 X X X X X X X X X X X L H X X X X I6 X X X X X X X X X X X X X L H X X I7 X X X X X X X X X X X X X X X L H Z (Z) H L H L H L H L H L H L H L H L Z (Z) L H L H L H L H L H L H L H L H H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care (Z) = High impedance (Off) GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current -- High Output Current -- Low Parameter Min 4.75 0 Typ 5.0 25 Max 5.25 70 - 2.6 24 Unit V C mA mA FAST AND LS TTL DATA 5-2 SN54/74LS251 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol S bl VIH VIL VIK VOH Parameter P Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 2.4 - 0.65 3.1 0.25 VOL IOZH IOZL IIH IIL IOS ICC Output LOW Voltage 0.35 Output Off Current HIGH Output Off Current LOW Input HIGH Current 0.1 Input LOW Current Short Circuit Current (Note 1) Power Supply Current 12 mA - 30 - 0.4 - 130 10 0.5 20 - 20 20 V A A A mA mA mA mA 0.4 Min 2.0 0.8 - 1.5 Typ Max Unit Ui V V V V V Test C di i T Conditions Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input LOW Voltage for All Inputs VCC = MIN, IIN = - 18 mA VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table IOL = 12 mA IOL = 24 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table VCC = MAX, VOUT = 2.7 V VCC = MAX, VOUT = 0.4 V VCC = MAX, VIN = 2.7 V VCC = MAX, VIN = 7.0 V VCC = MAX, VIN = 0.4 V VCC = MAX VCC = MAX, VE = 0 V VCC = MAX, VE = 4.5 V Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25C, VCC = 5.0 V) Limits S bl Symbol tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ P Parameter Propagation Delay, Select to Z Output Propagation Delay, Select to Z Output Propagation Delay, Data to Z Output Propagation Delay, Data to Z Output Output Enable Time to Z Output Output Enable Time to Z Output Output Disable Time to Z Output Output Disable Time to Z Output Min Typ 20 21 29 28 10 9.0 17 18 17 24 30 26 37 15 30 15 Max 33 33 45 45 15 15 28 28 27 40 45 40 55 25 45 25 Ui Unit ns ns ns ns ns ns ns ns Figure 1 Figure 2 Figure 1 Figures 2 Figures 4, 5 Figures 3, 5 Figures 3, 5 Figures 4, 5 T Test C di i Conditions CL = 15 pF, pF, RL = 2.0 k CL = 5.0 p , pF, RL = 667 k FAST AND LS TTL DATA 5-3 SN54/74LS251 3-STATE AC WAVEFORMS VIN 1.3 V tPLH 1.3 V tPHL 1.3 V VIN 1.3 V tPHL 1.3 V tPLH 1.3 V VOUT 1.3 V VOUT 1.3 V Figure 1 Figure 2 VE tPZL VOUT 1.3 V 1.3 V tPLZ 1.3 V 0.5 V 1.3 V VOL VE tPZH VOUT 1.3 V tPHZ 1.3 V 1.3 V VOH 1.3 V 0.5 V Figure 3 0.5 V Figure 4 AC LOAD CIRCUIT VCC SWITCH POSITIONS RL SW1 SYMBOL tPZH tPZL tPLZ tPHZ SW1 Open Closed Closed Closed SW2 Closed Open Closed Closed TO OUTPUT UNDER TEST 5 k CL* SW2 * Includes Jig and Probe Capacitance. Figure 5 FAST AND LS TTL DATA 5-4 |
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